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Usage Notes and Known Design Exceptions to Functional Specifications
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Advisory Master Subsystem Boot ROM: NMI Handler Can Return Before Clearing All the
Pending NMIs, if There is a Nested NMI
Revision(s) Affected 0
Details The Master Subsystem Boot ROM depends on the MNMIFLG.NMIINT bit to determine if
there is a pending NMI on the Master Subsystem. However, as mentioned in the
advisory titled "Master Subsystem: MNMIFLG.NMIINT Bit Will Not be Set in Some Cases
When an NMI is Still Pending", this bit might not be set. Therefore, the Master Boot
ROM NMI handler might return while there is an active NMI pending and MNMIWD
counter running. This will trigger MNMIWDRST and reset the entire device. The
probability of nested NMI happening during boot time is highly unlikely, unless there is a
critical issue elsewhere in the device.
Workaround(s) None. This is fixed in Revision A silicon.
Advisory Master Boot ROM: NMI Handler Not Executed if NMI Occurs at Power Up or
Immediately After a Reset
Revision(s) Affected 0
Details If there is an NMI at power up or immediately after a reset, the master Boot ROM will
branch to the NMI handler. Since access to all memories is blocked upon reset, the NMI
handler will not be able to acknowledge the NMI, which will cause the MNMIWD counter
to eventually overflow and reset the device. If this NMI is a missing clock NMI, there will
be another NMI after the MNMIWD reset because the MCLKSTS bit is not cleared by an
external (or watchdog) reset. Therefore, if there is a missing clock condition upon power
up or immediately after an external reset, then the device will keep resetting over and
over again.
Workaround(s) None. This is fixed in Revision A silicon.
Advisory Master Boot ROM: Parallel Boot Mode Will Not Work as Intended
Revision(s) Affected 0
Details Parallel boot mode does not transfer data into the device in the intended format.
Workaround(s) Use ARM production programming solutions for Cortex-M3 programming.
This is fixed in Revision A silicon.
32
F28M35x Concerto™ MCU Silicon Errata SPRZ357J–August 2011–Revised July 2014
Submit Documentation Feedback
Copyright © 2011–2014, Texas Instruments Incorporated
- Silicon Errata 1
- Contents 2
- 3 Device Markings 5
- 4.1 Usage Notes 6
- Submit Documentation Feedback 10
- Table 5. List of Advisories 11
- Revision(s) Affected 0, A, B 13
- Workaround(s) 16
- Revision(s) Affected 0 26
- Advisory Control Subsystem I 28
- Advisory Master Subsystem I 31
- 5 Documentation Support 37
- 6 Revision History 38
- IMPORTANT NOTICE 39
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